1. Field of the Invention
The present invention relates to a new type of nonvolatile memory (NVM) based on a Metal-Ferroelectric-Metal-Insulator (SiN.sub.x O.sub.y)-Semiconductor (Si)(MFMIS) structure. More particularly, the present invention relates to a new NVM memory cell structure, i.e., a ferroelectric field effect transistor (FEFET) using a new ferroelectric material.
2. Description of the Related Art
Recently, there has been interest in the use of ferroelectric materials for NVM operations. Nonvolatile ferroelectric RAM (FERAM) is desirable because data can be written at high speed (1-100 ns) and at conventional supply voltages (3-5 V). However, FERAMs use a destructive readout followed by a rewrite that limits cycling. Conventional NVM based on CMOS technology e.g., flash memory, as used in wireless communication has relatively slower write speed (.sup.18 1 msec) and read/write capabilities of only about 10.sup.6 cycles. For nonvolatile memory applications, high speed read/write capabilities and a minimum of 10.sup.10 read/write cycles are preferred.
The following characteristics of ferroelectric materials make them attractive for memory applications: (1) the ability to retain two stable remanent polarizations (.+-.P.sub.r) at zero electrical field, enabling memory nonvolatility; and (2) the reversibility (by applying voltage) of remanent polarization +P.sub.r (1) to -P.sub.r (0) or vice versa. A typical ferroelectric material used is PbZrTiO.sub.3 (also known as PZT); this material has a relatively high dielectric constant of about .epsilon.=1000. A drawback of early ferroelectric memories was that the amount of switched charge decreased with use because of fatigue after a relatively few (e.g., 10.sup.6) cycles.
There are two types of ferroelectric memory. One type is achieved with a device in which a ferroelectric thin-film capacitor memory element is integrated into conventional CMOS transistor technology. This design provides destructive readout only, e.g., ferroelectric RAM (FERAM), and thus has relatively limited utility. The other type of ferroelectric memory is a nonvolatile memory device relying on a metal-ferroelectric-silicon structure (so called MFS FET or FEFET). In contrast to conventional CMOS FET, a FEFET structure has a ferroelectric thin film in the transistor instead of a SiO.sub.2 insulator layer. A FEFET structure can be a useful NVM element since a change of the polarization direction of the ferroelectric film changes channel conductivity; no applied field or voltage is required to maintain memory. Nondestructive readout is achieved in an FEFET device since information is stored as a polarization direction rather than charge such as on a capacitor in an FERAM device. Operation speed (access and writing) of FEFET memory is .ltorsim.100 ns and determined by the polarization switching time of a ferroelectric film.
Conventional MFS FET structures have a few problems, such as diffusion of Pb, Ti and other components of the ferroelectric material into the adjacent Si or SiO.sub.2 layer. As a result of the diffusion, the trap density at the ferroelectric-Si interface dramatically increases to .apprxeq.10.sup.16, a level high enough to interfere with device switching. To solve this problem, a metal-ferroelectric-insulator structure in which a layer of CaF.sub.2 or MgAl.sub.2 O.sub.3 overlies the silicon layer and acts as a buffer layer between the ferroelectric film and the silicon layer, has been proposed. Another option is to grow an epitaxial ferroelectric BaMnF.sub.4 film on the silicon layer; this can be done as part of the manufacture of the gate structure of the FET. However, fabrication of either of these alternative structures is relatively difficult and involves expensive molecular beam epitaxy processing.
A PZT ferroelectric can be disadvantageous in certain memory applications because of its tendency to act as a source of metals, e.g., Pb, Ti and Zr, as ionic contaminants. PZT ferroelectric materials are also undesirable for MFMIS structure-based NVM because of their high dielectric constants(.epsilon..sub.f =1000). Application of 2 V switching voltage requires 25 V to be applied to the 10 nm SiO.sub.2 film (E.sub.ox =V.sub.ox /t.sub.ox =25 Mv/cm) , a very severe condition for a SiO .sub.2 film. Scott, et al., Science, Vol. 246, pages 1400-1405 (December 1989) also discuss several problems related to fatigue in PZT films.
SrBi.sub.2 Ta.sub.2 O.sub.9 has been used in FERAM elements with destructive readout as a polar material that is easy to switch at low voltages, but has not been used in MFMIS FET devices to date.
Therefore, a ferroelectric material having low dielectric constant and coercive field is needed for high speed, long-lasting MFMIS FET memory devices with nondestructive readout capability.